AZP92 Datasheet - Arizona Microtek

Clock Generation Chip

AZP92 Features

* Green and RoHS Compliant / Lead (Pb) Free Package Available 3.0V to 5.5V Operation Selectable Divide Ratio Selectable Enable Polarity and Threshold (CMOS/TTL or PECL) Selectable Input Biasing High Bandwidth for ≥1GHz Ava

AZP92 General Description

The AZP92 is a specialized ÷1 or ÷2 clock generation part including an enable/reset function. The divide ratio is selected with the DIV-SEL pin/pad. When DIV-SEL is open (NC), the AZP92 functions as a standard receiver. If DIV-SEL is connected to VEE, it functions as a ÷2 divider. A selectable enabl.

AZP92 Datasheet (132.98 KB)

AZP92 Datasheet Preview — Preview of AZP92 PDF

Datasheet Details

Part number:

AZP92

Manufacturer:

Arizona Microtek

File Size:

132.98 KB

Description:

Clock generation chip.

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AZP92 Clock Generation Chip Arizona Microtek

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AZP92 Features

AZP92 General Description

Datasheet Details

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Description:

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