AZP94 - Clock Generation Chip

Datasheet Details

The AZP94 is a specialized ÷1 or ÷2 clock generation part including an enable/reset function.

Green and RoHS Compliant / Lead (Pb) Free Package Available 3.0V to 5.5V Operation Selectable Divide Ratio Selectable Enable Polarity and Threshold (CMOS/TTL or PECL) Tristate Compatible Outputs Input Buffer Powers Down when Disabled Selectable Input Biasing High Bandwidth for ≥1GHz Available in a MLP 8 (2x2) Package IBIS Model File Available on Arizona Microtek Website.

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Published: Sep 17, 2007 |