CY14B512P Datasheet - Cypress Semiconductor

CY14B512P 512-Kbit (64 K X 8) Serial (SPI) nvSRAM

8 Status Register 9 Read Status Register (RDSR) Instruction 9 Write Status Register (WRSR) Instruction 9 Write Protection and Block Protection 10 Write Enable (WREN) Instruction 10 Write Disable (WRDI) Instruction 10 Block Protection 10 Hardware Write Protection (WP Pin) 11 Memory Access 11 Re.

CY14B512P Features

* 512-Kbit nonvolatile static random access memory (nvSRAM)

* Internally organized as 64 K × 8

* STORE to QuantumTrap nonvolatile elements initiated automatically on power-down (AutoStore) or by the user using HSB pin (Hardware STORE) or SPI instruction (Software STORE)

* REC

CY14B512P_CypressSemiconductor.pdf