Description
www.DataSheet4U.com CY241V08A-05,06 MPEG Clock Generator with VCXO .
Name XIN VDD VCXO VSS 27 MHz NC/VDD NC/VSS XOUT Pin Number 1 2 3 4 5 6 7 8 Reference crystal input Voltage supply Input analog control for VCXO Ground.
Features
* Integrated phase-locked loop (PLL)
* Low-jitter, high-accuracy outputs
* VCXO with analog adjust
* 3.3V operation
* Compatible with MK3727 (
* 5,
* 6)
Applications
* Meets critical timing requirements in complex system designs
CY241V08A
* 05,
* 06 Logic Block Diagram
13.5 XIN XOUT
OSC
Q
Φ VCO P
OUTPUT DIVIDERS
27 MHz
VCXO
PLL
VDD VSS
Pin Configurations
CY241V08A
* 05,
* 06 8-pin SOIC
XIN VDD VCXO VSS 1 2 3 4 8 7 6 5 XOU
