CY5057 - High-Frequency Flash Programmable PLL Die

Cypress Semiconductor

CY5057 Datasheet Preview — Preview of CY5057 PDF

Datasheet Details

Part number	CY5057
Manufacturer	Cypress Semiconductor
File Size	297.30 KB
Description	High-Frequency Flash Programmable PLL Die
Datasheet	CY5057_CypressSemiconductor.pdf

CY5057 Product details

Description

Note Active die size: X = 75.0 mils / 1907 μm Y = 56.2 mils / 1428 μm Scribe: Y (horizontal) = 2.8 mils / 71 μm X (vertical) = 3.4 mils / 86.2 μm Bond pad opening: 85 μm x 85 μm Pad pitch: 125 μm x 125 μm (pad center to pad center) Wafer thickness: 11 mils and 29 mils TYPICAL (See Ordering Information table for details) Die Pad Summary [Pad coordinates are referenced from the center of the die (X = 0, Y = 0)] Table 1. Die Pad Summary Name VDD VSS XIN XOUT PD#/OE VPP SDA SSON# 10 Die Pad 1,2 6,

Features

Benefits.
Flash programmable die for in-package programming of crystal oscillators High resolution phase-locked loop (PLL) with 10-bit multiplier and 7-bit divider Flash programmable capacitor tuning array Simple 2-pin programming interface (excluding VDD and VSS pins) On-chip oscillator used with external 25.1 MHz fundamental tuned crystal Flash programmable spread spectrum with spread percentages between +0.25% and +2.00% Spread spectrum o.

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Published: Sep 25, 2009 |