CYV15G0404DXB Datasheet - Cypress Semiconductor

CYV15G0404DXB - Independent Clock Quad HOTLink Transceiver

4 CYV15G0404DXB Transceiver Logic Block Diagram 5 Transmit Path Block Diagram 6 Receive Path Block Diagram 7 Device Configuration and Control Block Diagram 8 Pin Configuration (Top View) 9 Pin Configuration (Bottom View) 10 Pin Definitions CYV15G0404DXB Quad HOTLink II Transceiver 11 CYV15G0

CYV15G0404DXB Features

* Quad channel transceiver for 195 to 1500 MBaud serial signaling rate

* Aggregate throughput of up to 12 Gbits/second

* Second-generation HOTLink® technology

* Compliant to multiple standards

* SMPTE-292M, SMPTE-259M, DVB-ASI, Fibre Channel, ESCON, and Gigabit Ethernet (IEEE802.

CYV15G0404DXB_CypressSemiconductor.pdf