SC680E Datasheet - Cypress Semiconductor

SC680E SMBus System Clock Buffer

The SC680 is a high fanout system clock buffer. Its primary application is to create the large quantity of clocks needed to support a wide range of applications that requires those clock loads signal that are referenced to a single existing clock. Loads of up to 30 pF are supported. One of the chief.

SC680E Features

* 18 output buffer for high clock fanout applications Each output can be internally disabled for EMI reduction VDD=3.3 volts for chip Vdd Output frequency range 10 Mhz to 100 Mhz < 250ps skew between output clocks 48-pin SSOP package Single Clock Enable pin fo

SC680E_CypressSemiconductor.pdf