W40S11-02 Datasheet - Cypress Semiconductor

W40S11-02 SDRAM Buffer - 2 DIMM (Mobile)

SDRAM Outputs: Provides buffered copy of BUF_IN. The propagation delay from a rising input edge to a rising output edge is 1 to 5 ns. All outputs are skew controlled to within ± 250 ps of each other. Clock Input: This clock input has an input threshold voltage of 1.5V (typ). I2C Data Input: Data sho.

W40S11-02 Features

* Ten skew-controlled CMOS outputs (SDRAM0:9)

* Supports two SDRAM DIMMs

* Ideal for high-performance systems designed around Intel®’s latest Mobile chip set

* I2C Serial configuration interface

* Skew between any two outputs is less than 250 ps

* 1 to

W40S11-02 Datasheet (167.41 KB)