PDJ2108DEBG Datasheet - Deutron Electronics

PDJ2108DEBG 2G bits DDR3 SDRAM

DATA SHEET 2G bits DDR3 SDRAM PDJ2108DEBG (256M words × 8 bits) PDJ2116DEBG (128M words × 16 bits) Specifications Density: 2G bits Organization: ⎯ 32M words × 8 bits × 8 banks (PDJ2108DEBG) ⎯ 16M words × 16 bits × 8 banks (EDJ2116DEBG) Package: ⎯ 78-ball FBGA (PDJ2108DEBG) ⎯ 96-ball FBGA (PDJ2116DEBG) ⎯ Lead-free (RoHS compliant) and Halogen-free Power supply: VDD, VDDQ = 1.5V ± 0.075V Data rate ⎯ 1600Mbps/1333Mbps (max.) 1KB page size.

PDJ2108DEBG Features

* Double-data-rate architecture: two data transfers per clock cycle

* The high-speed data transfer is realized by the 8 bits prefetch pipelined architecture

* Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the re

PDJ2108DEBG Datasheet (1.91 MB)