* Section 11.1 Absolute M aximum Ratings, Section 13 Ordering Information) Updated Section 1 Features (integrated reference clock) Updated Section 3.1 PCI Express Interface Signals (Added REFCLKI_P, REFCLKI_N, REFCLKO_P[3:0], REFCLKO_N[3:0], and IREF) Updated Section 3.2 Port Configuration Signals (R
PI7C9X2G404SL Datasheet (1.10 MB)
PI7C9X2G404SL
1.10 MB
Pci express gen 2 packet switch.
PI7C9X2G404SL PCI EXPRESS GEN 2 PACKET SWITCH 4-Port, 4-Lane, SlimPacket PCIe2.0 Packet Switch DATASHEET REVISION 2-2 September 2017 Document Number .
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