GS88032AT-133 - 512K x 18/ 256K x 32/ 256K x 36 9Mb Sync Burst SRAMs

GS88032AT-133 Datasheet Preview — Preview of GS88032AT-133 PDF

Datasheet Details

Part number	GS88032AT-133
Manufacturer	ETC
File Size	756.70 KB
Description	512K x 18/ 256K x 32/ 256K x 36 9Mb Sync Burst SRAMs
Datasheet	GS88032AT-133_ETC.pdf

GS88032AT-133 Product details

Description

Applications The GS88018/32/36AT is a 9,437,184-bit (8,388,608-bit for x32 version) high performance synchronous SRAM with a 2-bit burst address counter.Although of a type originally developed for Level 2 Cache applications supporting high performance CPUs, the device now finds application in synchronous SRAM applications, ranging from DSP main store to networking chip set support.Core and Interface Voltages The GS88018/32/36AT operates on a 2.5 V or 3.3 V power supply.All input are 3.3 V an

Features

FT pin for user-configurable flow through or pipeline operation.
Single Cycle Deselect (SCD) operation.
2.5 V or 3.3 V +10%/.
10% core power supply.
2.5 V or 3.3 V I/O supply.
LBO pin for Linear or Interleaved Burst mode.
Internal input resistors on mode pins allow floating mode pins.
Default to Interleaved Pipeline mode.
Byte Write (BW) and/or Global Write (GW) operation.
Internal self-timed write cycle.

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Published: Mar 23, 2005 |