* Single Cycle Deselect (SCD) operation
* 2.5 V or 3.3 V +10%/
* 10% core power supply
* 2.5 V or 3.3 V I/O supply
* LBO pin for Linear or Interleaved Burst mode
* Internal input resistors on mode pins allow floating mode pins
* Default to Interl
GS88019AT Datasheet (748.17 KB)
GS88019AT
GSI Technology
748.17 KB
9mb sync burst srams.
Datasheet Errata
Revision: 5/17/02
GS88019/33/37AT
Base datasheet:
GS88019/33/37AT, Rev.1.00, 3/2002
Product(s) covered in this supplement:
GS88019/.
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