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GS88018AT-200I Datasheet - ETC

GS88018AT-200I - 512K x 18/ 256K x 32/ 256K x 36 9Mb Sync Burst SRAMs

Applications The GS88018/32/36AT is a 9,437,184-bit (8,388,608-bit for x32 version) high performance synchronous SRAM with a 2-bit burst address counter.

Although of a type originally developed for Level 2 Cache applications supporting high performance CPUs, the device now finds application in synch

GS88018AT-200I Features

* FT pin for user-configurable flow through or pipeline operation

* Single Cycle Deselect (SCD) operation

* 2.5 V or 3.3 V +10%/

* 10% core power supply

* 2.5 V or 3.3 V I/O supply

* LBO pin for Linear or Interleaved Burst mode

* Internal input r

GS88018AT-200I_ETC.pdf

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Datasheet Details

Part number:

GS88018AT-200I

Manufacturer:

ETC

File Size:

756.70 KB

Description:

512k x 18/ 256k x 32/ 256k x 36 9mb sync burst srams.

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