PH300 Datasheet - ETC

PH300 PEAK HOLD DETECTOR

FUNCTION IN [0 to (V+ - 1.5V)] V [-5 V to -6 V] RCEXT HRES HCAP DSCHG ISET GND DUMP [TTL control, active LOW] RAMP [TTL control, active LOW] GATE [TTL input, open HIGH] PKDT [TTL logic level] Vd [+5 V] V+ [+5 V to +12 V] COMP OUT [0 to (V+ - 1.5V) (typical)] OUTPUT CHARACTERISTICS ANALOG PIN 1 IN .

www.DataSheet4U.com AMP TEK PEAK HOLD DETECTOR PH300 STATE-OF-THE-ART PERFORMANCE High Speed (250 ns rise time) Extremely Low Droop Rate (10 nV/µs) Low Power (< 36 mW) Ramp & Dump Hold Discharge Model PH300 is a high performance, thin film hybrid, peak-hold unit, designed to track and hold the peak of analog input signals with rise times (10% to 90% of Vmax) as short as 250 ns. The unit also has the lowest Droop Rate of the held voltage available and.

PH300 Features

* Operates from -55 to +125 °C Small size (16 pin hybrid DIP) Very low power (36 mW quiescent) High speed Low droop rate Ramp discharge Fast reset Build-in linear gate Internal hold capacitor

PH300 Datasheet (237.75 KB)