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M13L128168A DDR SDRAM

M13L128168A Description

ESMT Revision History Revision 1.3 -Revise operation voltage.(page 5) Revision 1.2 -Changed tWTR from 1 tCK to 2 tCK.Revision 1.1 -Changed absolute .

M13L128168A Features

* z z z z z z z z z z z z z z z z z z z z M13L128168A 2M x 16 Bit x 4 Banks Double Data Rate SDRAM JEDEC Standard Internal pipelined double-data-rate architecture, two data access per clock cycle Bi-directional data strobe(DQS) On-chip DLL Differential clock inputs (CLK and CLK ) DLL aligns DQ and D

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Datasheet Details

Part number
M13L128168A
Manufacturer
EliteMT
File Size
864.84 KB
Datasheet
M13L128168A_EliteMT.pdf
Description
DDR SDRAM

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DDR SDRAM EliteMT
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