* Description
* Fully Synchronous to Positive Clock Edge
* VDD= 1.8V +/- 0.1V for 133MHz Power Supply VDD= 1.85V+/- 0.1V for 166MHz
* LVCMOS Compatible with Multiplexed Address
* Programmable Burst Length (B/L) - 1, 2, 4, 8 or Full Page
* Programmable CAS Late
EM48BM1684LBA Datasheet (285.90 KB)
EM48BM1684LBA
Eorex
285.90 KB
512mb synchronous dram.
eorex
Revision History
Revision 0.1 (May. 2007) - First release.
Revision 0.2 (May. 2008).. - change package out-line spec :
from 12.5mm x 10.0mm to 1.
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