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74VCX162835 - Low Voltage 18-Bit Universal Bus Driver

Datasheet Summary

Description

The VCX162835 low voltage 18-bit universal bus driver combines D-type latches and D-type flip-flops to allow data flow in transparent, latched and clocked modes.

Data flow is controlled by output-enable (OE), latch-enable (LE), and clock (CLK) inputs.

Features

  • s Compatible with PC100 DIMM module specifications s 1.65V.
  • 3.6V VCC specifications provided s 3.6V tolerant inputs and outputs s 26Ω series resistors in outputs s tPD (CP to On) 4.2ns max for 3.0V to 3.6V VCC 5.2ns max for 2.3V to 2.7V VCC 9.2ns max for 1.65V to 1.95V VCC s Power-down high impedance inputs and outputs s Supports live insertion/withdrawal (Note 1) s Static Drive (IOH/IOL) ±12mA @ 3.0V VCC ±8 mA @ 2.3V VCC ±3 mA @ 1.65V VCC s ESD performance: Human body model > 2000V Machi.

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Datasheet Details

Part number 74VCX162835
Manufacturer Fairchild Semiconductor
File Size 102.19 KB
Description Low Voltage 18-Bit Universal Bus Driver
Datasheet download datasheet 74VCX162835 Datasheet
Additional preview pages of the 74VCX162835 datasheet.

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Full PDF Text Transcription

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74VCX162835 Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs/Outputs and 26Ω Series Resistors in Outputs October 1998 Revised April 2000 74VCX162835 Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs/Outputs and 26Ω Series Resistors in Outputs General Description The VCX162835 low voltage 18-bit universal bus driver combines D-type latches and D-type flip-flops to allow data flow in transparent, latched and clocked modes. Data flow is controlled by output-enable (OE), latch-enable (LE), and clock (CLK) inputs. The device operates in Transparent Mode when LE is held HIGH. The device operates in clocked mode when LE is LOW and CLK is toggled. Data transfers from the Inputs (In) to Outputs (On) on a Positive Edge Transition of the Clock.
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