DM7476 Datasheet - Fairchild Semiconductor

Dual Master-Slave J-K Flip-Flop

DM7476 General Description

This device contains two independent positive pulse triggered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flop after a complete clock pulse. While the clock is LOW the slave is isolated from the master. On the positive transition of the clock, the data from t.

DM7476 Datasheet (41.28 KB)

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DM7476

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Fairchild Semiconductor

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41.28 KB

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Dual master-slave j-k flip-flop.
DM7476 Dual Master-Slave J-K Flip-Flops with Clear, Preset, and Complementary Outputs September 1986 Revised February 2000 DM7476 Dual Master-Slave .

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DM7476 Dual Master-Slave J-K Flip-Flop Fairchild Semiconductor

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DM7476 General Description

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