Master-Slave Datasheet | Specifications & PDF Download

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Корпус: DIP-14 Микросхема К561ТМ2 представляет собой два двухступенчатых (master-slave) D-триггера со входами асинхронной установки и сброса и против

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LM4308 www.ti.com SNLS225C – AUGUST 2007 – REVISED MAY 2013 LM4308 Mobile Pixel Link Two (MPL-2) – 18-bit CPU Display Interface Master/Slave Check

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MC10131 Dual Type D Master-Slave Flip-Flop The MC10131 is a dual master–slave type D flip–flop. Asynchronous Set (S) and Reset (R) override Clock (CC)

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DM7476 Dual Master-Slave J-K Flip-Flops with Clear, Preset, and Complementary Outputs September 1986 Revised July 2001 DM7476 Dual Master-Slave J-K

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RDA012M4MS DATASHEET DS_0017PB0-2805 www.DataSheet4U.com RDA012M4MS 12 Bit 1.3 GS/s Master-Slave 4:1 MUXDAC Features ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ 12

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5476 DM5476 DM7476 Dual Master-Slave J-K Flip-Flops with Clear Preset and Complementary Outputs June 1989 5476 DM5476 DM7476 Dual Master-Slave J-K F

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SN5472, SN7472 AND-GATED J-K MASTER-SLAVE FLIP-FLOPS WITH PRESET AND CLEAR SDLS117 – DECEMBER 1983 – REVISED MARCH 1988 PRODUCTION DATA information i

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SN5472, SN7472 AND-GATED J-K MASTER-SLAVE FLIP-FLOPS WITH PRESET AND CLEAR SDLS117 – DECEMBER 1983 – REVISED MARCH 1988 PRODUCTION DATA information i

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HCC/HCF4095B HCC/HCF4096B GATE J-K MASTER-SLAVE FLIP-FLOPS . . . . . . . 16 MHz TOGGLE RATE (typ.) AT VDD - VSS = 10V GATED INPUTS QUIESCENT CURRENT

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HCC/HCF4095B HCC/HCF4096B GATE J-K MASTER-SLAVE FLIP-FLOPS . . . . . . . 16 MHz TOGGLE RATE (typ.) AT VDD - VSS = 10V GATED INPUTS QUIESCENT CURRENT

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HCC40xxx, HCC45xxx Datasheet Rad-hard, high voltage, CMOS logic series Flat-14 Flat-16 DIL-14 DIL-16 Flat-24 DIL-24 The upper metallic lid is not

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HCC/HCF4095B HCC/HCF4096B GATE J-K MASTER-SLAVE FLIP-FLOPS . . . . . . . 16 MHz TOGGLE RATE (typ.) AT VDD - VSS = 10V GATED INPUTS QUIESCENT CURRENT

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HCC/HCF4095B HCC/HCF4096B GATE J-K MASTER-SLAVE FLIP-FLOPS . . . . . . . 16 MHz TOGGLE RATE (typ.) AT VDD - VSS = 10V GATED INPUTS QUIESCENT CURRENT

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HCC/HCF4027B DUAL-J-K MASTER-SLAVE FLIP-FLOP . . . . . . . . SET-RESET CAPABILITY STATIC FLIP-FLOP OPERATION - RETAINS STATE INDEFINITELY WITH CLOCK

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual Type D Master-Slave Flip-Flop The MC10131 is a dual master–slave type D flip–flop. Asynchronous Set (S) and

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual J-K Master-Slave Flip-Flop The MC10135 is a dual master–slave dc coupled J–K flip–flop. Asynchro– nous set

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CD4027BM CD4027BC Dual J-K Master Slave Flip-Flop with Set and Reset February 1988 CD4027BM CD4027BC Dual J-K Master Slave Flip-Flop with Set and Re

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CD4027BM CD4027BC Dual J-K Master Slave Flip-Flop with Set and Reset February 1988 CD4027BM CD4027BC Dual J-K Master Slave Flip-Flop with Set and Re

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CD4027BMS December 1992 CMOS Dual J-K Master-Slave Flip-Flop Pinout CD4027BMS TOP VIEW Features • High Voltage Type (20V Rating) • Set - Reset Capab

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