Datasheet4U Logo Datasheet4U.com

74LS73 - Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops

74LS73 Description

DM74LS73A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs August 1986 Revised March 2000 DM74LS73A Dua.
This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs.

📥 Download Datasheet

Preview of 74LS73 PDF
datasheet Preview Page 2 datasheet Preview Page 3

Datasheet Details

Part number
74LS73
Manufacturer
Fairchild Semiconductor
File Size
53.28 KB
Datasheet
74LS73_FairchildSemiconductor.pdf
Description
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops

📁 Related Datasheet

  • 74LS74 - LOW-POWER SCHOTTKY (ON Semiconductor)
  • 74LS74A - DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP (Motorola)
  • 74LS76 - Dual JK Flip-Flop (ON Semiconductor)
  • 74LS76A - Dual JK Flip-Flop (ON Semiconductor)
  • 74LS77 - 4-BIT D LATCH LOW-POWER SCHOTTKY (Motorola)
  • 74LS783 - Synchronous Address Multiplexer (Motorola)
  • 74LS793 - 8-Bit Latch/Register (Monolithic)
  • 74LS794 - 8-Bit Latch/Register (Monolithic)

📌 All Tags

Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops Fairchild Semiconductor
Fairchild Semiconductor 74LS73-like datasheet