Description
These P-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar, DMOS technology.
Features
- -5.4A, -200V, RDS(on) = 0.8Ω @VGS = -10 V Low gate charge ( typical 33 nC) Low Crss ( typical 45 pF) Fast switching 100% avalanche tested Improved dv/dt capability
S D G!
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G
S
D-PAK
SFR Series
I-PAK
G D S
SFU Series.
 
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D
Absolute Maximum Ratings
Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD
TC = 25°C unless otherwise noted
Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current - Continuous.