74C165 Datasheet - Fairchild

74C165 Parallel-Load 8-Bit Shift Register

The MM74C165 functions as an 8-bit parallel-load, serial shift register. Data is loaded into the register independent of the state of the clock(s) when PARALLEL LOAD (PL) is low. Shifting is inhibited as long as PL is low. Data is sequentially shifted from complementary outputs, Q7 and Q7, highest-o.

74C165 Features

* s Wide supply voltage range: 3V to 15V s Guaranteed noise margin: 1V s High noise immunity: 0.45 VCC (typ.) s Low power TTL compatibility: fan out of 2 driving 74L s Parallel loading independent of clock s Dual clock inputs s Fully static operation Ordering Code: Order Number MM74165N Package Numbe

74C165-Fairchild.pdf