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MM74HC138 3-to-8 Line Decoder

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Description

MM74HC138 3-to-8 Line Decoder September 1983 Revised February 1999 MM74HC138 3-to-8 Line Decoder General .
The MM74HC138 decoder utilizes advanced silicon-gate CMOS technology and is well suited to memory address decoding or data routing applications.

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Features

* high noise immunity and low power consumption usually associated with CMOS circuitry, yet has speeds comparable to low power Schottky TTL logic. The MM74HC138 has 3 binary select inputs (A, B, and C). If the device is enabled, these inputs determine which one of the eight normally HIGH outputs will

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