MM74HC139 Datasheet - Fairchild

MM74HC139 Dual 2-To-4 Line Decoder

The MM74HC139 decoder utilizes advanced silicon-gate CMOS technology, and is well suited to memory address decoding or data routing applications. It possesses the high noise immunity and low power consumption usually associated with CMOS circuitry, yet has speeds comparable to low power Schottky TTL.

MM74HC139 Features

* s Typical propagation delays

* Select to outputs (4 delays): 18 ns Select to output (5 delays): 28 ns Enable to output: 20 ns s Low power: 40 µW quiescent supply power s Fanout of 10 LS-TTL devices s Input current maximum 1 µA, typical 10 pA Ordering Code: Order Number MM74HC139M MM74HC139S

MM74HC139_FairchildSemiconductor.pdf