DSP56321 Datasheet - Freescale Semiconductor

DSP56321 24-Bit Digital Signal Processor

3-2 3.2 MAP-BGA Package Mechanical Drawing 3-10 Design Considerations 4.1 Thermal Design Considerations4-1 4.2 Electrical Design Considerations4-2 4.3 Power Consumption Considerations4-3 4.4 Input (EXTAL) Jitter Requirements 4-4 Appendix A Power Consumption Benchmark Data Sheet Conventions OVERBA.

Freescale Semiconductor Technical Data DSP56321 Rev. 11, 2/2005 DSP56321 24-Bit Digital Signal Processor 3 16 6 6 Memory Expansion Area SCI Triple Timer Address Generation Unit Six Channel DMA Unit Bootstrap ROM Internal Data Bus Switch Clock Generator PLL EXTAL XTAL RESET PINIT/NMI PIO_EB PM_EB XM_EB YM_EB HI08 ESSI EFCOP Peripheral Expansion Area Program RAM 32 K × 24 bits or 31 K × 24 bits and Instruction Cache 1024 × 24 bits X Data RAM 80 K × 24 bits Y Data RAM 80 K × 24 bi.

DSP56321 Features

* iii Target Applications iv Product Documentation v Signals/Connections 1.1 Power 1-3 1.2 Ground 1-3 1.3 Clock1-3 1.4 External Memory Expansion Port (Port A) 1-4 1.5 Interrupt and Mode Control 1-6 1.6 Host Interface (HI08)1-7 1.7 Enhanced Synchronous Serial Interface 0 (ESSI0) 1-10 1.8 Enhanced Sync

DSP56321 Datasheet (880.66 KB)