* 16-Bit S12 CPU, 64/48 kByte P-FLASH,
* 6.0 kByte RAM; 4/2 kByte D-FLASH
* Background debug (BDM) & debug module (DBG)
* Die to Die bus interface for transparent memory mapping
* On-chip oscillator & two independent watchdogs
* www.DataSheet4U.net LIN
MM912G634CV1AE Datasheet (5.21 MB)
MM912G634CV1AE
Freescale Semiconductor
5.21 MB
Integrated s12 based relay driver.
Freescale Semiconductor Advance Information
Document Number: MM912_634D1 Rev. 4.0, 5/2011
Integrated S12 Based Relay Driver with LIN
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