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GLT6400L08 - Ultra Low Power 512k x 8 CMOS SRAM

This page provides the datasheet information for the GLT6400L08, a member of the GLT6400L08_G Ultra Low Power 512k x 8 CMOS SRAM family.

Datasheet Summary

Description

The GLT6400L08 is a low power CMOS Static RAM organized as 524,288 x 8 bits.

Easy memory expansion is provided by an active LOW CE1 an active LOW OE , and Tri-state I/O’s.

an automatic power-down mode feature when deselected.

Features

  • : Low-power consumption. -active: 45mA at 85ns. -stand by : 20 µA (CMOS input / output) 5 µA (CMOS input / output, SL) ∗ Single +2.7 to 3.3V power supply.

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Datasheet Details

Part number GLT6400L08
Manufacturer G-Link
File Size 172.89 KB
Description Ultra Low Power 512k x 8 CMOS SRAM
Datasheet download datasheet GLT6400L08 Datasheet
Additional preview pages of the GLT6400L08 datasheet.

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www.DataSheet4U.com G -LINK GLT6400L08 Ultra Low Power 512k x 8 CMOS SRAM Feb 2001(Rev. 1.1) Features : Low-power consumption. -active: 45mA at 85ns. -stand by : 20 µA (CMOS input / output) 5 µA (CMOS input / output, SL) ∗ Single +2.7 to 3.3V power supply. Description : The GLT6400L08 is a low power CMOS Static RAM organized as 524,288 x 8 bits. Easy memory expansion is provided by an active LOW CE1 an active LOW OE , and Tri-state I/O’s. This device has ∗ an automatic power-down mode feature when deselected. ∗ Equal access and cycle time. Writing to the device is accomplished by taking ∗ 85 ns access time at 2.7V to 3.3V 70ns chip Enable 1 ( CE1 ) with Write Enable ( WE ) LOW. ∗ ∗ ∗ ∗ ∗ access time at 3V to 3.6V 1.0V data retention mode. TTL compatible, tri-state input/output.
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