* 2.5 Clock Latency
* Simultaneous Read and Write SigmaDDRTM Interface
* JEDEC-standard pinout and package
* Double Data Rate interface
* Byte Write controls sampled at data-in time
* Burst of 2 Read and Write
* Dual-Range On-Die Termination (O
GS81302TT38E Datasheet (227.52 KB)
GS81302TT38E
GSI Technology
227.52 KB
144mb sigmaddr-ii+ burst of 2 sram.
GS81302TT06/11/20/38E-500/450/400/350
165-Bump BGA Commercial Temp Industrial Temp
144Mb SigmaDDRTM-II+ Burst of 2 SRAM
500 MHz
*350 MHz 1.8.
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