Description
GS8170DD36C-333/300/250/200 209-Bump BGA Commercial Temp Industrial Temp .
Because SigmaRAMs are synchronous devices, address data inputs and read/write control inputs are captured on the rising edge of the input clock.
Features
* Double Data Rate Read and Write mode
* Late Write; Pipelined read operation
* JEDEC-standard SigmaRAM™ pinout and package
* 1.8 V +150/
* 100 mV core power supply
* 1.8 V CMOS Interface
* ZQ controlled user-selectable output drive strength
Applications
* where a data rate markedly faster than the RAM’s latency is desired, the Double Data Rate protocol doubles the data transfer rate (read or write bandwidth) achieved in Pipeline mode while keeping the RAM’s clock frequency constant. In Double Data Rate mode, the RAM multiplexes the results of a read
