Description
GS8170LW36/72AC-350/333/300/250 209-Bump BGA Commercial Temp Industrial Temp .
Because SigmaRAMs are synchronous devices, address data inputs and read/write control inputs are captured on the rising edge of the input clock.
Features
* Late Write mode, Pipelined Read mode
* JEDEC-standard SigmaRAM™ pinout and package
* 1.8 V +150/
* 100 mV core power supply
* 1.8 V CMOS Interface
* ZQ controlled user-selectable output drive strength
* Dual Cycle Deselect
* Burst Read
Applications
* and in Flow Through mode NBT SRAMs. SigmaRAM Late Write with Pipelined Read
Read CK Deselect Write Read Read
Address
A
XX
C
D
E
F
ADV
/E1
/W
DQ
QA
DC
QD
CQ Key Hi-Z
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Access
Byte Write Control The Byte Write Enable inputs (Bx) determine which bytes will be writte
