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GS8321EV18GE - 36Mb Sync Burst SRAMs

This page provides the datasheet information for the GS8321EV18GE, a member of the GS8321EV18E 36Mb Sync Burst SRAMs family.

Description

Applications The GS8321EV18/32/36E is a 37,748,736-bit high performance synchronous SRAM with a 2-bit burst address counter.

Features

  • FT pin for user-configurable flow through or pipeline operation.
  • Dual Cycle Deselect (DCD) operation.
  • IEEE 1149.1 JTAG-compatible Boundary Scan.
  • 1.8 V +10%/.
  • 10% core power supply.
  • 1.8 V I/O supply.
  • LBO pin for Linear or Interleaved Burst mode.
  • Internal input resistors on mode pins allow floating mode pins.
  • Default to Interleaved Pipeline mode.
  • Byte Write (BW) and/or Global Write (GW) operation.
  • Int.

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Datasheet preview – GS8321EV18GE

Datasheet Details

Part number GS8321EV18GE
Manufacturer GSI Technology
File Size 718.65 KB
Description 36Mb Sync Burst SRAMs
Datasheet download datasheet GS8321EV18GE Datasheet
Additional preview pages of the GS8321EV18GE datasheet.

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Full PDF Text Transcription

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GS8321EV18/32/36E-250/225/200/166/150/133 165-Bump FP-BGA Commercial Temp Industrial Temp 2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs 250 MHz–133 MHz 1.8 V VDD 1.8 V I/O Features • FT pin for user-configurable flow through or pipeline operation • Dual Cycle Deselect (DCD) operation • IEEE 1149.1 JTAG-compatible Boundary Scan • 1.8 V +10%/–10% core power supply • 1.
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