Description
Preliminary GS8342Q08/09/18/36E-300/250/200/167 165-Bump BGA Commercial Temp Industrial Temp 36Mb SigmaQuad-II Burst of 2 SRAM 167 MHz *300 .
Table
Symbol
SA NC R W
BW
Description
Synchronous Address Inputs No Connect
Synchronous Read Synchronous Write
Synchronous Byte Write
BW0.
BW.
Features
* Simultaneous Read and Write SigmaQuad™ Interface
* JEDEC-standard pinout and package
* Dual Double Data Rate interface
* Byte Write controls sampled at data-in time
* Burst of 2 Read and Write
* 1.8 V +100/
* 100 mV core power supply
Applications
* where alternating reads and writes are needed. Therefore, the SigmaQuad-II SRAM interface and truth table are optimized for alternating reads and writes. Separate I/O SRAMs are unpopular in applications where multiple reads or multiple writes are needed because burst read or write transfers from Sep
