* Aerospace-Level Product
* 2.0 clock Latency with DLL on
* 1.0 clock Latency with DLL off
* Optional DLL-controlled output timing
* Can be operated with DLL on or off
* Simultaneous Read and Write SigmaQuad™ Interface
* JEDEC-standard pinout a
GS8692DT19CE Datasheet (1.98 MB)
GS8692DT19CE
GSI Technology
1.98 MB
Rad-hard sram.
GS82612DT19/37CE/LE-350M/250M (S/Q/V) GS81332DT19/37CE/LE-350M/250M (S/Q/V) GS8692DT19/37CE/LE-350M/250M (S/Q/V)
165-Bump CCGA & LGA
Rad-Hard SRAM
.
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