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GS8692DT19CE - Rad-Hard SRAM

Download the GS8692DT19CE datasheet PDF. This datasheet also covers the GS82612DT19 variant, as both devices belong to the same rad-hard sram family and are provided as variant models within a single manufacturer datasheet.

Features

  • Aerospace-Level Product.
  • 2.0 clock Latency with DLL on.
  • 1.0 clock Latency with DLL off.
  • Optional DLL-controlled output timing.
  • Can be operated with DLL on or off.
  • Simultaneous Read and Write SigmaQuad™ Interface.
  • JEDEC-standard pinout and package.
  • Dual Double Data Rate interface.
  • Byte Write controls sampled at data-in time.
  • Burst of 4 Read and Write.
  • Dual-Range On-Die Termination (ODT) on Data (D).

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (GS82612DT19-GSITechnology.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number GS8692DT19CE
Manufacturer GSI Technology
File Size 1.98 MB
Description Rad-Hard SRAM
Datasheet download datasheet GS8692DT19CE Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
GS82612DT19/37CE/LE-350M/250M (S/Q/V) GS81332DT19/37CE/LE-350M/250M (S/Q/V) GS8692DT19/37CE/LE-350M/250M (S/Q/V) 165-Bump CCGA & LGA Rad-Hard SRAM Military Temp 288Mb/144Mb/72Mb Burst of 4 SigmaQuad-II+TM 350 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Aerospace-Level Product • 2.0 clock Latency with DLL on • 1.0 clock Latency with DLL off • Optional DLL-controlled output timing • Can be operated with DLL on or off • Simultaneous Read and Write SigmaQuad™ Interface • JEDEC-standard pinout and package • Dual Double Data Rate interface • Byte Write controls sampled at data-in time • Burst of 4 Read and Write • Dual-Range On-Die Termination (ODT) on Data (D), Byte Write (BW), and Clock (K, K) inputs • 1.8 V +100/–100 mV core power supply • 1.5 V or 1.
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