HD74AC273 Datasheet - Hitachi Semiconductor

HD74AC273 Octal D Flip-Flop

The HD74AC273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR ) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before t.

HD74AC273 Features

* Ideal Buffer for MOS Microprocessor or Memory Eight Edge-Triggered D Flip-Flops Buffered Common Clock Buffered, Asynchronous Master Reset See HD74AC373 for Transparent Latch Version See HD74AC374 for 3-State Version Outputs Source

HD74AC273_HitachiSemiconductor.pdf