Part number:
HD74AC112
Manufacturer:
File Size:
209.33 KB
Description:
Dual jk negative edge-triggered flip-flop.
HD74AC112 Datasheet (209.33 KB)
* individual J, K, Clock and asynchronous Set and Clear inputs to each flipflop. When the clock goes High, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may change when the clock is High and the bistable will perform according to the Truth Table as long as min
HD74AC112 Datasheet (209.33 KB)
HD74AC112
209.33 KB
Dual jk negative edge-triggered flip-flop.
📁 Related Datasheet
HD74AC112 Dual JK Negative Edge-Triggered Flip-Flop (Hitachi Semiconductor)
HD74AC107 Dual JK Flip-Flop (with Separate Clear and Clock) (Hitachi Semiconductor)
HD74AC107 Dual JK Flip-Flop (Renesas)
HD74AC123A Dual Retriggerable Resettable Multivibrator (Hitachi Semiconductor)
HD74AC123A Dual Retriggerable Resettable Multivibrator (Renesas)
HD74AC125 Quad Buffer/Line Driver with 3-State Output (Hitachi Semiconductor)
HD74AC125 Quad Buffer/Line Driver (Renesas)
HD74AC126 Quad Buffer/Line Driver with 3-State Output (Hitachi Semiconductor)
HD74AC126 Quad Buffer/Line Driver (Renesas)
HD74AC138 1-of-8 Decoder/Demultiplexer (Hitachi Semiconductor)
