HD74AC107 - Dual JK Flip-Flop (with Separate Clear and Clock)

Product Overview

Hitachi Semiconductor

Part number	HD74AC107
Manufacturer	Hitachi Semiconductor
File Size	57.91 KB
Description	Dual JK Flip-Flop (with Separate Clear and Clock)
Datasheet	HD74AC107 Datasheet
Additional preview pages of the HD74AC107 datasheet.

The HD74AC107/HD74ACT107 dual JK master/slave flip-flops have a separate clock for each flip-flop.

Outputs Source/Sink 24 mA.
HD74ACT107 has TTL-Compatible Inputs Pin Arrangement J1 1 Q1 2 Q1 3 K1 4 Q2 5 Q2 6 GND 7 (Top view) 14 VCC 13 CD1 12 CP1 11 K2 10 CD2 9 CP2 8 J2 HD74AC107/HD74ACT107 Logic Symbol 3 8 9 Q1 2 11 1 12 4 J1 CP1 K1 Q1 J2 CP2 K2 Q2 6 CD1 13 CD2 10 Q2 5 VCC = Pin14 GND = Pin7 Pin Names J1, J2, K1, K2 CP1, CP2 C D1, CD2 Q1, Q2, Q1, Q 2 Data Inputs Clock Pulse Inputs (Active Falling Edge) Direct Clear Inputs (Active Low) Outputs Truth Table I.

📁 Similar Datasheet

Other Datasheets by Hitachi Semiconductor

Published: Mar 23, 2005 |