HD74AC112 - Dual JK Negative Edge-Triggered Flip-Flop

Product Overview

Hitachi Semiconductor

Part number	HD74AC112
Manufacturer	Hitachi Semiconductor
File Size	59.65 KB
Description	Dual JK Negative Edge-Triggered Flip-Flop
Datasheet	HD74AC112 Datasheet
Additional preview pages of the HD74AC112 datasheet.

The HD74AC112/HD74ACT112

individual J, K, Clock and asynchronous Set and Clear inputs to each flip-flop. When the clock goes High, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may change when the clock is High and the bistable will perform according to the Truth Table as long as minimum setup and hold times are observed. Input data is transferred to the outputs on the falling edge of the clock pulse. Features.
Outputs Source/Sink 24 mA.
HD74ACT112 has TTL-Com.

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Published: Mar 23, 2005 |