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HD74CDC2509B Datasheet - Hitachi Semiconductor

HD74CDC2509B 3.3-V Phase-lock Loop Clock Driver

The HD74CDC2509B is a high-performance, low-skew, low-jitter, phase-lock loop clock driver. It uses a phase-lock loop (PLL) to precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (CLK) input signal. It is specifically designed for use with synchronous DRAMs. The HD.

HD74CDC2509B Features

* Meets “PC SDRAM registered DIMM design support document, Rev. 1.2” Phase-lock loop clock distribution for synchronous DRAM applications External feedback (FBIN) pin is used to synchronize the outputs to the clock input No external RC network required

HD74CDC2509B_HitachiSemiconductor.pdf

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Datasheet Details

Part number:

HD74CDC2509B

Manufacturer:

Hitachi Semiconductor

File Size:

42.83 KB

Description:

3.3-v phase-lock loop clock driver.

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HD74CDC2509B HD74CDC2509B 3.3-V Phase-lock Loop Clock Driver Hitachi Semiconductor

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