HD74CDC857 - 3.3/2.5-V Phase-lock Loop Clock Driver

Product Overview

Hitachi Semiconductor

Part number	HD74CDC857
Manufacturer	Hitachi Semiconductor
File Size	54.28 KB
Description	3.3/2.5-V Phase-lock Loop Clock Driver
Datasheet	HD74CDC857 Datasheet
Additional preview pages of the HD74CDC857 datasheet.

The HD74CDC857 is a high-performance, low-skew, low-jitter, phase locked loop clock driver.

Supports 100 MHz to 150 MHz operation range.
1.
Distributes one differential clock input pair to ten differential clock outputs pairs.
SSTL_2 (Stub Series Terminated Logic) differential inputs and LVCMOS reset (G) input.
Supports spread spectrum clock.
External feedback pins (FBIN, FBIN) are used to synchronize the outputs to the clock input.
Supports both 3.3 V/2.5V analog supply voltage (AV CC), and 2.5 V VDDQ.
No external RC.

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Other Datasheets by Hitachi Semiconductor

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Published: Mar 23, 2005 |