74HC114 Datasheet (Hitachi) - Dual J-K Flip-Flops

74HC114, Dual J-K Flip-Flops

This flip-flop is edge sensitive to the clock input and change state on the negative transition of the clock pulse.

each flip-flop has independent J, K and preset inputs and Q and Q outputs.

Two flip-flops are controlled by a common clear and a common clock.

Preset and clear are independent of the c

74HC114 Features

* High Speed Operation: tpd (Clock to Q) = 18 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C) Free D