Datasheet4U Logo Datasheet4U.com

74HC107 Datasheet - Philips

74HC107 Dual JK flip-flop

The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. 74HC/HCT107 The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, clock (nCP) and re.
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT107 Dual JK flip-flop with reset; negative-edge trigger Product specification File under Integrated Circuits, IC06 December 1990 Philips Semiconductors Product specification Dual JK flip-flop with reset; negative-edge tr.

74HC107_PhilipsSemiconductors.pdf

Preview of 74HC107 PDF
74HC107 Datasheet Preview Page 2 74HC107 Datasheet Preview Page 3

Datasheet Details

Part number:

74HC107

Manufacturer:

Philips

File Size:

53.68 KB

Description:

Dual jk flip-flop.

74HC107 Distributor

📁 Related Datasheet

74HC10 Triple 3-input NAND gate (Philips)

74HC10 Triple 3-Input NAND Gates (Texas Instruments)

74HC10 Triple 3-input NAND gate (nexperia)

74HC10-Q100 Triple 3-input NAND gate (nexperia)

74HC107 Dual JK flip-flop (nexperia)

74HC107-Q100 Dual JK flip-flop (nexperia)

74HC107D Dual JK flip-flop (nexperia)

74HC109 Dual J-K Positive-Edge-Triggered Flip-Flops (Texas Instruments)

TAGS

74HC107 74HC107 Dual flip-flop Philips