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HYMP125U64CP8-S5 Datasheet - Hynix Semiconductor

HYMP125U64CP8-S5 240pin DDR2 SDRAM Unbuffered DIMMs based on 1Gb C version

and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 0.6 / Jul. 2008 1 1240pin DDR2 SDRAM Unbuffered DIMMs SPEED GRADE & KEY PARAMETERS C4 (DDR2-533) Speed@CL3 Speed@CL4 Speed@CL5 Speed@CL.

HYMP125U64CP8-S5 Features

* JEDEC standard Double Data Rate2 Synchrnous DRAMs (DDR2 SDRAMs) with 1.8V +/ - 0.1V Power Supply All inputs and outputs are compatible with SSTL_1.8 interface 8 Bank architecture Posted CAS Programmable CAS Latency 3 ,4 ,5, 6 OCD (Off-Chip Driver Impedance Adjustment) ODT (On-Die Terminati

HYMP125U64CP8-S5 Datasheet (252.14 KB)

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Datasheet Details

Part number:

HYMP125U64CP8-S5

Manufacturer:

Hynix Semiconductor

File Size:

252.14 KB

Description:

240pin ddr2 sdram unbuffered dimms based on 1gb c version.

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HYMP125U64CP8-S5 240pin DDR2 SDRAM Unbuffered DIMMs based 1Gb version Hynix Semiconductor

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