* High-speed access time: 35, 45, 55, 70 ns
* Low active power: 450 mW (typical)
* Low standby power: 150 µW (typical) CMOS standby
* Output Enable (OE) and two Chip Enable (CE1 and CE2) inputs for ease in applications
* Fully static operation: no clock or ref
IC62C1024AL Datasheet (167.20 KB)
IC62C1024AL
ICSI
167.20 KB
128k x 8 low power cmos sram.
www.DataSheet4U.com IC62C1024AL Document Title 128K x 8 Low Power CMOS SRAM Revision History Revision No 0A History Initial Draft Draft Date May 7.
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