IC61S25632T Datasheet (Integrated Circuit Solution)

IC61S25632T, 8Mb SyncBurst Pipelined SRAM

ICSI's 8Mb SyncBurst Pipelined SRAMs integrate a 512k x 18, 256k x 32, or 256k x 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter.

Applications The ICSI SyncBurst Pipelined SRAM family employs high-speed ,low-power CMOS designs that are fabricated using an advanc

IC61S25632T/D IC61S25636T/D IC61S51218T/D Document Title 8Mb SyncBurst Pipelined SRAM Revision History Revision No 0A 0B History Initial Draft 1.

Move the FT pin for user-configurable Flow throught or pipelineed operation, That pin can be NC or connected to VCC for pipelined operation.

Refer to Pin configuration.

Revise the power supply charaetoristics at page 12 3.

Resive the tKQ of 250 MHZ from 2.5ns to 3ns.

Move the 100 MHZ speed grade.

Draft Date Remark September 24,2001 August 13

IC61S25632T Features

* Pipeline Mode operation Single/Dual Cycl Deselect User-selectable Output Drive Strength with XQ Mode Internal self-timed write cycle Individual Byte W