IC61S51218D Datasheet PDF - Integrated Circuit Solution 8Mb SyncBurst Pipelined SRAM Specs

IC61S51218D - 8Mb SyncBurst Pipelined SRAM

This page provides the datasheet information for the IC61S51218D, a member of the IC61S25632T 8Mb SyncBurst Pipelined SRAM family.

Datasheet Summary

Description

ICSI's 8Mb SyncBurst Pipelined SRAMs integrate a 512k x 18, 256k x 32, or 256k x 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter.

Features

Pipeline Mode operation Single/Dual Cycl Deselect User-selectable Output Drive Strength with XQ Mode Internal self-timed write cycle Individual Byte Write Control and Global Write Clock controlled, registered address, data and control Pentium™ or linear burst sequence control using MODE input Common data inputs and data outputs JEDEC 100-Pin TQFP a.

Datasheet Details

Part number	IC61S51218D
Manufacturer	Integrated Circuit Solution
File Size	420.54 KB
Description	8Mb SyncBurst Pipelined SRAM
Datasheet	IC61S51218D Datasheet
Additional preview pages of the IC61S51218D datasheet.

📁 Similar Datasheet

IC61C1024 - 128K x 8 HIGH-SPEED CMOS STATIC RAM (ICS)

IC61C1024L - 128K x 8 HIGH-SPEED CMOS STATIC RAM (ICS)

IC61LV12816 - 128K x 16 Hight Speed SRAM (ICSI)

IC61LV256 - 32K x 8 Hight Speed SRAM (ICSI)

IC61LV5128 - 512K x 8 Hight Speed SRAM (ICSI)

IC61LV6416 - 64K x 16 Hight Speed SRAM (ICSI)

IC62C1024 - 128K X 8 HIGH SPEED CMOS STATIC RAM (ICSI)

IC62C1024AL - 128K x 8 Low Power CMOS SRAM (ICSI)

IC62C1024L - 128K X 8 LOW POWER CMOS STATIC RAM (ICSI)

IC62LV1008L - 1 M x 8 bit Low Voltage and Ultra Low Power CMOS Static RAM (ICSI)

Full PDF Text Transcription

Click to expand full text

IC61S25632T/D IC61S25636T/D IC61S51218T/D Document Title 8Mb SyncBurst Pipelined SRAM Revision History Revision No 0A 0B History Initial Draft 1. Move the FT pin for user-configurable Flow throught or pipelineed operation, That pin can be NC or connected to VCC for pipelined operation. Refer to Pin configuration. 2. Revise the power supply charaetoristics at page 12 3. Resive the tKQ of 250 MHZ from 2.5ns to 3ns. 4. Move the 100 MHZ speed grade. Draft Date Remark September 24,2001 August 13,2002 The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices. Integrated Circuit Solution Inc.

Published: Nov 15, 2013 |