M1026 - (M1025 / M1026) VCSO BASED CLOCK PLL
The M1025/26 is a VCSO (Voltage Controlled SAW Oscillator) based clock jitter attenuator PLL designed for clock jitter attenuation and frequency translation.
The device is ideal for generating the transmit reference clock for optical network systems supporting up to 2.5Gb data rates.
It can serve to
M1026 Features
* Figure 1: Pin Assignment Example I/O Clock Frequency Combinations Using M1025-11-155.5200 or M1026-11-155.5200 Input Reference Clock (MHz) (M1025) (M1026) GND GND GND OP_IN nOP_OUT nVC VC OP_OUT nOP_IN 1 2 3 4 5 6 7 8 9 PLL Ratio (Pin Selectable) (M1025) (M1026) Output Clock (MHz) (Pin Selecta
