9FGL0641 - 6-Output 3.3V PCIe Clock Generator

IDT

9FGL0641 Datasheet Preview — Preview of 9FGL0641 PDF

Datasheet Details

Part number	9FGL0641
Manufacturer	IDT
File Size	319.72 KB
Description	6-Output 3.3V PCIe Clock Generator
Datasheet	9FGL0641-IDT.pdf

9FGL0641 Product details

Description

The 9FGL0641 / 9FGL0651 devices are 3.3V members of IDT's 3.3V Full-Featured PCIe family. 4 Common Clocked architectures (CC), PCIe Separate Reference no-Spread (SRnS) and Separate Reference Independent Spread (SRIS) clocking architectures. Servers/High-Performance Computing/Accelerators

Features

Six 100MHz Low-Power HCSL (LP-HCSL) DIF pairs:.
9FGL0641 default Zo = 100Ω.
9FGL0651 default Zo = 85Ω.
One 3.3V LVCMOS REF output with Wake-On-LAN (WOL) support.
See AN-891 for easy AC-coupling to other logic families Key Specifications.
PCIe Gen1.
4 CC compliant; Gen2.
3 SRIS compliant.
DIF cycle-to-cycle jitter < 50ps.
DIF output-.

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Published: Apr 5, 2019 |