IDT72V3612 - CMOS FIFO memories

IDT

Datasheet Details

The IDT72V3612 is designed to run off a 3.3V supply for exceptionally lowpowerconsumption.

Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions.
Supports clock frequencies up to 83 MHz.
Fast access times of 8ns.
Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted).
Mailbox bypass Register for each FIFO.
Programmable Almost-Full and Almost-Empty Flags.
Microprocessor interface control logic.

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