IDT82P2821 - High-Density T1/E1/J1 Line Interface
11 BLOCK DIAGRAM 12 1 PIN ASSIGNMENT 13 2 PIN DESCRIPTION 18 3 FUNCTIONAL DESCRIPTION 29 3.1 T1 / E1 / J1 MODE SELECTION 29 3.2 RECEIVE PATH 29 3.2.1 Rx Termination 29 3.2.1.1 Receive Differential Mode 29 3.2.1.2 Receive Single Ended Mode 31 3.2.2 Equalizer 32 3.2.2.1 Line Monitor 32 3.2.
21(+1) Channel High-Density T1/E1/J1 Line Interface Unit IDT82P2821 Version 3 February 6, 2009 6024 Silver Creek Valley Road, San Jose, California 95138 Telephone: 1-800-345-7015 or 408-284-8200 TWX: 910-338-2070 FAX: 408-284-2775 Printed in U.S.A.
© 2009 Integrated Device Technology, Inc.
DISCLAIMER Integrated Device Technology, Inc.
reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and
