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IDT8T73S208I - LVPECL Clock Divider and Fanout Buffer

IDT8T73S208I Description

2.5V, 3.3V Differential LVPECL Clock IDT8T73S208I Divider and Fanout Buffer DATA SHEET General .
The IDT8T73S208I is a high-performance differential LVPECL clock divider and fanout buffer.

IDT8T73S208I Features

* One differential input reference clock
* Differential pair can accept the following differential input levels: LVDS, LVPECL, CML

IDT8T73S208I Applications

* demanding well-defined performance and repeatability. The integrated input termination resistors make interfacing to the reference source easy and reduce passive component count. Each output can be individually enabled or disabled in the high-impedance state controlled by a I2C register. On power-up

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Datasheet Details

Part number
IDT8T73S208I
Manufacturer
IDT
File Size
1.19 MB
Datasheet
IDT8T73S208I-IDT.pdf
Description
LVPECL Clock Divider and Fanout Buffer

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